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Handbook of VLSI Chip Design and Expert Systems


Author: A. F. Schwarz

Publisher: Academic Press

Publish Date: 1st March 1993

ISBN-13: 9781483258058

Pages: 590

Language: English



Handbook of VLSI Chip Design and Expert Systems provides information pertinent to the fundamental aspects of expert systems, which provides a knowledge-based approach to problem solving. This book discusses the use of expert systems in every possible subtask of VLSI chip design as well as in the interrelations between the subtasks.Organized into nine chapters, this book begins with an overview of design automation, which can be identified as Computer-Aided Design of Circuits and Systems (CADCAS). This text then presents the progress in artificial intelligence, with emphasis on expert systems. Other chapters consider the impact of design automation, which exploits the basic capabilities of computers to perform complex calculations and to handle huge amounts of data with a high speed and accuracy. This book discusses as well the characterization of microprocessors. The final chapter deals with interactive I/O devices.This book is a valuable resource for system design experts, circuit analysts and designers, logic designers, device engineers, technologists, and application-specific designers.

Table of Contents

Preface Chapter 1 VLSI Chip Design 1.1 Computer-Aided Circuit and System Design 1.1a Impacts of the Rapidly Changing Technology 1.1b The Hierarchical Approach to Chip Design 1.1c Design Methodologies 1.2 Cadcas Tools in Chip Design 1.2a Design, Simulation and Testing 1.2b Layout Design 1.3 Computers and Artificial Intelligence 1.3a Digital Computers 1.3b The AI Approach to Computer-Aided Chip Design Chapter 2 Programming Tools in Chip Design 2.1 Personal Computers 2.1a PC Hardware 2.1b PC Software 2.2 Operating Systems 2.2a Operating System Principles 2.2b Operating Systems for Personal Computers 2.3 Database Systems and Computer Networks 2.3a Design Databases and Data Models 2.3b Database-Management Systems 2.3c Computer Networks Chapter 3 New Developments in Programming 3.1 Fourth-Generation Languages 3.1a Five Generations of Programming Languages 3.1b Fourth-Generation Programming 3.2 Non Von Neumann Architectures 3.2a Computer Architectures 3.2b Non Von Neumann Computers 3.2c Processor-Array Architectures 3.3 Artificial Intelligence 3.3a Heuristic Methods of Solving 3.3b Expert Systems, Powerful AI Applications 3.3c Fifth-Generation Languages 3.4 LISP 3.4a Basics of LISP 3.4b LISP Implementations and Machines 3.5 Logic Programming 3.5a Predicate Calculus 3.5b Prolog 3.5c Prolog Implementations 3.6 The Object-Oriented Environment 3.6a Object-Oriented Programming 3.6b Smalltalk 3.6c Object-Oriented Databases Chapter 4 Expert Systems 4.1 Expert Systems Fundamentals 4.1a Expert System Architecture 4.1b Problem Solving Strategies 4.1c Dealing with Uncertainty 4.2 Knowledge Representation 4.2a Knowledge Acquisition 4.2b Production Rules 4.2c Semantic Networks and Object-Oriented Representations 4.3 Knowledge Processing 4.3a Production Systems 4.3b Logic Programming and Object-Oriented Systems 4.3c Shells and Tools 4.4 Programming Environments 4.4a Knowledge-Based Management 4.4b AI Architectures 4.4c Linking Declarative and Procedural Languages 4.5 Applications of Expert Systems 4.5a Types of Expert System 4.5b An Anthology of Expert Systems 4.5c Expert Systems in Electronic Engineering Chapter 5 VLSI System Design and Expert Systems 5.1 Logic-Circuit Design 5.1a Logic Modules 5.1b Synthesis of Sequential Circuits 5.1c Data Processor and Controller Design 5.2 High-Level System Design 5.2a VLSI Design Aspects 5.2b Intelligent High-Level Synthesis 5.2c Automated Systems for High-Level Logic Synthesis 5.2d Expert Systems for Logic Circuit and System Design 5.3 ASIC Design 5.3a ASIC Design Methodologies 5.3b Silicon Compilers 5.3c Expert Systems for ASIC Design Chapter 6 Design Verification and Expert Systems 6.1 System Simulation 6.1a High-Level Simulation and Design 6.1b Hardware Verification and Expert Systems 6.2 Logic Simulation 6.2a Gate-Level and Functional Simulation 6.2b Timing Verification 6.2c Switch-Level and Timing Simulation 6.2d Expert Systems for Digital-Circuit Verification 6.3 Circuit Simulation 6.3a Circuit-Element-Level and Mixed-Mode Simulation 6.3b Expert Systems for Analog Circuits Chapter 7 VLSI Testing and Expert Systems 7.1 Fault Diagnosis 7.1a Fault Models 7.1b Testability Measures 7.1c Expert Systems for Fault Diagnosis 7.2 Test Generation 7.2a Path Sensitizing and D Algorithm 7.2b Alternative Methods for Test Generation 7.2c Fault Simulation 7.2d Expert Systems for Test Generation 7.3 Design for Testability 7.3a Scan-In/Scan-Out Methods 7.3b Built-in Testing 7.3c Expert Systems for VLSI Design Testability Chapter 8 Layout Design and Expert Systems 8.1 Placement and Routing 8.1a Partitioning and Placement 8.1b Global Routing 8.2 Layout Design of Block Structures 8.2a Block Structures and Symbolic Layout 8.2b Heuristic Approaches to Floorplanning 8.2c Expert Systems for Layout Design 8.3 Local Routing 8.3a Algorithms for Local Routing 8.3b Expert Systems for Local Routing 8.4 Layout Verification 8.4a Design-Rule Checking and Circuit Extraction 8.4b Expert Systems for Layout Verification Chapter 9 Modern Design Methodologies 9.1 Human-Computer Interaction 9.1a Interactive Graphics Tools 9.1b Intelligent User Interfaces 9.2 Workstations for Chip Design 9.2a Engineering Workstations 9.2b Advanced CADCAS Workstations 9.3 Problem-Solving Tools 9.3a Machine Learning 9.3b Neural Networks 9.3c VLSI Applications of Neural Networks 9.3d Toward the Sixth Generation References Index